Digital IC Designer for Hard Disk Drive Read Channel

About Agere Systems:

Agere Systems is a global leader in semiconductors for storage, wireless data, and public and enterprise networks. The company's chips and software power a broad range of computing and communications applications, from cell phones, PCs, PDAs, hard disk drives and gaming devices to the world's most sophisticated wireless and wireline networks. Agere's customers include top manufacturers of consumer electronics, communications and computing equipment. Agere's products connect people to information and entertainment at home, at work and on the road -- enabling the connected lifestyle. Agere Systems' Storage Division is the world leader in preamplifier and read channel integrated circuits. We have been a valued provider of electronics solutions to hard disk drive OEMs for over 10 years. From PRML read channels and controller ASICs to Preamplifiers and Motor Controllers, we deliver advanced, high performance HDD electronics.

Position Description:

A read channel digital IC design engineer¡¯s duties include working within a highly motivated product development team to create and modify high speed digital integrated circuits. You will support the cross functional team in taking our concepts thru to high volume production and assist us in becoming the market leaders in this Mass Storage (hard disk drive) industry.

Job Responsibilities:

  • Working with a Architecture/Algorithm Development Team to finalize system architecture for optimal implementation of digital signal processing algorithms, including architectural definition and tradeoffs, die size estimation.
  • Digital logic design, verilog coding, logic synthesis, both RTL and gate level simulations, formal verification and static timing analysis.
  • Perform transistor level high speed digital integrated circuit design various cells and blocks within custom chips for the hard disk drive industry. Examples of cells and blocks include multiplexers, adders, multipliers, dividers, specific functional macro blocks.

Job Qualifications:

  • Communicate effectively within a global business environment (must be proficient in both spoken and written English)
  • Experience in logic design, synthesis, static timing analysis, and verification
  • Experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, and formal verification
  • Experience in developing simulation and verification test benches
  • Knowledge of Verilog/VHDL design languages
  • Excellent technical troubleshooting and demonstrated problem solving skills
  • Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation


  • Required Degree: BS
  • Preferred Degree: MS or PhD
  • Preferred Major: Microelectronics, Electrical Engineering or related discipline